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@uoftasic

University of Toronto - ASIC Team

Undergraduate IC Design team at the University of Toronto

UofT ASIC Team

This is the github profile of the University of Toronto ASIC Team. The team was founded with the mission of bringing practical IC Design experience to undergraduate students.

What we do

The team works with TinyTapeout and uses Open Source CAD & EDA tools to design, test, and fabricate various ICs. Please check the pinned projects for some examples of designs we are working on. You can learn more about the team from our website: uoftasic.com

Mission Statement

The ASIC Team is focused on the following objectives:

  1. Creating practical IC Design Opportunities for University Students.
  2. Contributing back to the Open Source Silicon Community.
  3. Creating Resources for interested parties to get started with IC design.

Contact

You can find us on email: team@uoftasic.com

Pinned Loading

  1. simproc simproc Public

    SimpleProcessor, taped out on TTSky25b

    SystemVerilog 1

Repositories

Showing 10 of 25 repositories
  • sentry Public
    uoftasic/sentry's past year of commit activity
    Verilog 0 Apache-2.0 0 20 0 Updated Sep 18, 2026
  • uoftasic.github.io Public

    Project Team portfolio website

    uoftasic/uoftasic.github.io's past year of commit activity
    SCSS 0 0 0 1 Updated Sep 17, 2026
  • uoftasic/ttsky-verilog-tinyCGRA's past year of commit activity
    SystemVerilog 0 Apache-2.0 0 0 0 Updated Sep 17, 2026
  • ece334-labs Public
    uoftasic/ece334-labs's past year of commit activity
    Python 0 0 1 0 Updated Sep 5, 2026
  • ece334-docs Public
    uoftasic/ece334-docs's past year of commit activity
    TeX 0 0 0 0 Updated Sep 5, 2026
  • edu Public

    The primary repo to host the educational material made by the UofT ASIC Team

    uoftasic/edu's past year of commit activity
    HTML 0 0 0 0 Updated Sep 4, 2026
  • ic101 Public
    uoftasic/ic101's past year of commit activity
    Python 0 MIT 0 0 0 Updated Sep 4, 2026
  • dd102 Public

    DD102 — Digital Logic & FPGAs. Draw a circuit, transcribe it to SystemVerilog, and run it on an FPGA. UofT ASIC internal education.

    uoftasic/dd102's past year of commit activity
    SystemVerilog 0 MIT 0 0 0 Updated Sep 4, 2026
  • workspace Public
    uoftasic/workspace's past year of commit activity
    Shell 0 0 0 0 Updated Sep 4, 2026
  • dd104 Public

    DD104 — Pre-Silicon Verification. Verilator and cocotb: find the bugs hiding in a real 8-bit core. UofT ASIC internal education.

    uoftasic/dd104's past year of commit activity
    Python 0 MIT 0 0 0 Updated Sep 4, 2026

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