Check spelling with codespell

Workflow runs for Check spelling with codespell

• stm32/boards/OPENMV_N6: Put IRAM in ITCM and use 2MB of RAM.

  completed successfully:
  Check spelling with codespell#127:Commit658c8b3pushedbysfe-SparkFro
  stm32n6-sram

  Oct 30, 202619s
  More actions for workflow run 127

• stm32/boards/OPENMV_N6: Use ITCM for IRAM, and FLEXRAM+AXISRAM1-2 for…

  completed successfully:
  Check spelling with codespell#126:Commitcffb33dpushedbysfe-SparkFro
  stm32n6-sram

  Oct 30, 202611s
  More actions for workflow run 126

• stm32/boards/OPENMV_N6: Enable PSRAM.

  completed successfully:
  Check spelling with codespell#125:Commit01730fbpushedbysfe-SparkFro
  stm32n6-psram

  Oct 30, 202614s
  More actions for workflow run 125

• stm32/boards: Use fixed I/O compensation codes on STM32N6 boards.

  completed successfully:
  Check spelling with codespell#124:Commit5314ec1pushedbysfe-SparkFro
  stm32n6-io-compensation

  Oct 30, 20261m 8s
  More actions for workflow run 124

• stm32/boards/OPENMV_N6: Enable PSRAM.

  completed successfully:
  Check spelling with codespell#123:Commit90556f8pushedbysfe-SparkFro
  stm32n6-psram

  Oct 30, 202617s
  More actions for workflow run 123

• stm32/boards/STM32N6570_DK: Add NPU RAM to GC heap.

  completed successfully:
  Check spelling with codespell#122:Commit7db72ddpushedbysfe-SparkFro
  stm32n6-sram

  Oct 30, 20263m 20s
  More actions for workflow run 122

• stm32/boards/STM32N6570_DK: Add NPU RAM to GC heap.

  completed successfully:
  Check spelling with codespell#121:Commit7db72ddpushedbysfe-SparkFro
  stm32n6-sram

  Oct 30, 20263m 33s
  More actions for workflow run 121

• stm32/boards/NUCLEO_N657X0: Add NPU RAM to GC heap.

  completed successfully:
  Check spelling with codespell#120:Commit684bffepushedbysfe-SparkFro
  stm32n6-sram

  Oct 30, 202616s
  More actions for workflow run 120

• stm32/powerctrl: Slow the STM32N6 flash clock during Stop mode.

  completed successfully:
  Check spelling with codespell#119:Commit74b656epushedbysfe-SparkFro
  stm32n6-nucleo-flash-200mhz

  Oct 30, 202616s
  More actions for workflow run 119

• stm32/xspi: Read the status register in DTR mode when switching to SPI.

  completed successfully:
  Check spelling with codespell#118:Commitabaa77epushedbysfe-SparkFro
  stm32n6-nucleo-flash-200mhz

  Oct 30, 202615s
  More actions for workflow run 118

• esp32/machine_i2c_target: Fix reads after a partial read on ESP32-S3.

  completed successfully:
  Check spelling with codespell#117:Commit8ee4798pushedbysfe-SparkFro
  master

  Oct 30, 202621s
  More actions for workflow run 117

• stm32/boards/OPENMV_N6: Enable PSRAM.

  completed successfully:
  Check spelling with codespell#116:Commitdd6ce3apushedbysfe-SparkFro
  stm32n6-psram

  Oct 29, 202612s
  More actions for workflow run 116

• stm32/powerctrl: Restore all PLLs after Stop mode on STM32N6.

  completed successfully:
  Check spelling with codespell#115:Commitc333bf2pushedbysfe-SparkFro
  stm32n6-lightsleep

  Oct 29, 202615s
  More actions for workflow run 115

• stm32/boards/NUCLEO_N657X0: Add NPU RAM to GC heap.

  completed successfully:
  Check spelling with codespell#114:Commitdce1cbfpushedbysfe-SparkFro
  stm32n6-sram

  Oct 28, 202614s
  More actions for workflow run 114

• stm32/xspi: Read the status register in DTR mode when switching to SPI.

  completed successfully:
  Check spelling with codespell#113:Commit63f3af8pushedbysfe-SparkFro
  stm32n6-nucleo-flash-200mhz

  Oct 28, 202616s
  More actions for workflow run 113

• stm32/powerctrl: Restore all PLLs after Stop mode on STM32N6.

  completed successfully:
  Check spelling with codespell#112:Commit3077ca8pushedbysfe-SparkFro
  stm32n6-lightsleep

  Oct 28, 202617s
  More actions for workflow run 112

• stm32: Run STM32N6 flash at full 200MHz.

  completed successfully:
  Check spelling with codespell#111:Commitde3c8fdpushedbysfe-SparkFro
  stm32n6-nucleo-flash-200mhz

  Oct 27, 202613s
  More actions for workflow run 111

• stm32: Run STM32N6 flash at full 200MHz.

  completed successfully:
  Check spelling with codespell#110:Commit0348233pushedbysfe-SparkFro
  stm32n6-nucleo-flash-200mhz

  Oct 27, 202611s
  More actions for workflow run 110

• stm32: Add AXISRAM3-6 and the NPU cache RAM to the heap on STM32N6.

  completed successfully:
  Check spelling with codespell#109:Commit45971dapushedbysfe-SparkFro
  stm32n6-sram

  Oct 27, 20263m 28s
  More actions for workflow run 109

• tests: Move path normalisation code to Test class __init__ method.

  completed successfully:
  Check spelling with codespell#108:Commita39e77fpushedbysfe-SparkFro
  master

  Oct 27, 202613s
  More actions for workflow run 108

• stm32/boards/OPENMV_N6: Enable PSRAM.

  completed successfully:
  Check spelling with codespell#107:Commitd424642pushedbysfe-SparkFro
  stm32n6-psram

  Oct 26, 202618s
  More actions for workflow run 107

• stm32: Run STM32N6 flash at full 200MHz.

  completed successfully:
  Check spelling with codespell#106:Commit3c6edd0pushedbysfe-SparkFro
  stm32n6-nucleo-flash-200mhz

  Oct 23, 202613s
  More actions for workflow run 106

• esp32: Allow I2S pins to be None.

  completed successfully:
  Check spelling with codespell#105:Commit682e3f1pushedbysfe-SparkFro
  master

  Oct 23, 202612s
  More actions for workflow run 105

• stm32/powerctrl: Reset the USB PHY after Stop mode on STM32N6.

  completed successfully:
  Check spelling with codespell#104:Commit3e1ca81pushedbysfe-SparkFro
  stm32n6-lightsleep

  Oct 22, 202615s
  More actions for workflow run 104

• stm32/boards/STM32N6570_DK: Add board files.

  completed successfully:
  Check spelling with codespell#103:Commit26808e1pushedbysfe-SparkFro
  stm32n6-dk-board

  Oct 21, 202616s
  More actions for workflow run 103