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phsauter
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Oct 26, 2026
phsauter
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- Replaces the IHP provided standard cells with the EZ130 8T v1.1 cells
- Drops the 7 metal stack
- Removes PDK selection and statically uses EZ130 8T and SG13CMOS5L
- Adapt the backend flow to these cells
- Patches EZ130 8T flip-flop Verilog models to be used with Verilator
- Switch to oseda-2026.09 as the main supported version
- Switch tracing from compressed FST to VCD in Verilator (bug in oseda-2026.09/10)
Mirror the EZ130 8T Liberty, LEF, tech LEF and Verilog model from the pinned release archive, add zip support to update_pdk.sh and drop the sg13g2 standard-cell, IO and 7-metal files, the sg13g2 bondpad and the unused sg13g2 filling patch. The Verilator patch now ties the delayed timing-check signals of the EZ130 8T model to their inputs.
Use the EZ130 8T cells and the cmos5l stack (Metal1..Metal4 + TopMetal1) in the flow, constraints and metric tests, and drop the PDK selection. Scripts use technology/ directly (no PDK_ROOT indirection), the tools come from oseda/iic-osic-tools 2026.09 (AOI31 enabled again) and the README and .cockpitrc describe the EZ130 8T cells.
Use the newest EZ130 8T standard cell library in the cockpit installation, as in the public mirror, and the newest KLayout it provides.
Verilator lowers the sequential UDPs of DFFQX1 and DFFRQX1 to blocking assignments, which race in flop chains and broke the JTAG shift path of the netlist simulation. Use nonblocking behavioral flops under VERILATOR. Also drop committed bytecode, remove a stale gitignore entry, install PDK files with mode 0644 and complete the tech LEF attribution.
--trace-fst needs lz4.h, which the oseda image does not have yet (iic-osic-tools PR #391). Switch back to --trace-fst once that is released.
…lation The cockpit links the vendor ez130_8t.v into technology/, whose flip-flop UDPs race in Verilator (JTAG ID code 0 in the netlist simulation).
Power grid with a macro grid for the SRAM ring, read_slang for synthesis, placement density and flop clustering, CTS buffer selection, parasitics estimate and the NAND2 reference cell for the gate equivalent.
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October 26, 2026 17:37
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