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[hardware] 🐛 Fix fixed-point rounding, vssrl shift and vnclip clamp - #515

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davidharrishmc:fix/fixed-point-rounding
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davidharrishmc:fix/fixed-point-rounding

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This pull request was generated by an AI assistant (Claude Code) and has not been reviewed by a human. Please review it with that in mind.

Fixes #506. fixed_p_rounding is rewritten around one function that computes the rounding increment from the RVV 1.0 roundoff definition (3.8), using the low log2(SEW) bits of the shift amount (log2(2SEW) and the 2SEW source for vnclip/vnclipu) and returning 0 for a shift of 0. vssrl uses only log2(SEW) bits of the shift amount. vnclip/vnclipu now saturate to the destination range and set vxsat on the destination element's bytes.

valu still keeps only the latest ALU operation's vxsat, so for a narrowing pair the first half's saturation can be lost; that is not addressed here.

Verification (Verilator, NrLanes=4, VLEN=512): 96 vssra.vx/vssrl.vx/vnclip.wx/vnclipu.wx cases (several values and shift amounts, all four vxrm modes, result and vxsat) against a reference implementation of the spec: 48 wrong on main, all correct with this change. This likely covers part of #163.

Changelog

Fixed

Checklist

  • Automated tests pass (Ara's own test suite was not run; see Verification)
  • Changelog updated
  • Code style guideline is observed

fixed_p_rounding used the whole shift-amount element, read bit -1 for a shift of 0, ignored the
sticky bits for rne and rounded vnclip on SEW lanes instead of the 2*SEW source. Compute the
increment with one function from the RVV 1.0 roundoff definition. vssrl now uses only
log2(SEW) bits of the shift amount, and vnclip/vnclipu clamp to the destination range and set
vxsat on the destination element's bytes.

Fixes pulp-platform#506

Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com>
Signed-off-by: David Harris <David_Harris@hmc.edu>

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vssra/vssrl/vnclip/vnclipu: wrong rounding increment, vssrl shift amount, no vnclip saturation

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