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[hardware] 🐛 Fix vaadd/vasub results on overflow - #513
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The averaging add/subtract computed the SEW-bit sum or difference without the extra bit, so signed overflow flipped the sign of the result (vaadd 0x8c+0xe4 gave 0x38, not 0xb8) and vasub and vasubu were wrong whenever the difference overflowed. Extend both operands by one bit (sign for vaadd/vasub, zero for vaaddu/vasubu) and take bits SEW:1 plus the rounding increment. Fixes pulp-platform#228 Co-Authored-By: Claude Opus 5.5 (1M context) <noreply@anthropic.com> Signed-off-by: David Harris <David_Harris@hmc.edu>
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This pull request was generated by an AI assistant (Claude Code) and has not been reviewed by a human. Please review it with that in mind.
Fixes #228.
vaadd/vasubcomputed the SEW-bit sum or difference without the extra bit, so signed overflow flipped the sign of the result, andvasubudropped the borrow. Both operands are now extended by one bit (sign forvaadd/vasub, zero forvaaddu/vasubu) and the result is bits SEW:1 plus the rounding increment.Verification (Verilator, NrLanes=4, VLEN=512):
vaadd.vv0x8c+0xe4 gives 0xb8 (main: 0x38),vasub.vv0x80-0x7f gives 0x81 (main: 0x01),vasubu.vv0x00-0x02 gives 0xff (main: 0x7f).Changelog
Fixed
vaadd/vasub/vasuburesults when the sum or difference overflows SEW (Issue in vector single-width averaging add and subtract instructions: wrong results #228)Checklist