Open-source NPU and FPGA research, initiated and operated by Altifigence.
PCCX connects architecture and ISA documentation, reusable SystemVerilog RTL, verification and board integration. We welcome reproducible experiments, focused fixes, tests and documentation contributions.
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| Repository | Role |
|---|---|
| pccx | Architecture, ISA, implementation notes, evidence and contribution guidance |
| pccx-v002 | Reusable v002 IP-core sources and compatibility contracts |
| pccx-FPGA-NPU-LLM-kv260 | KV260 board/model integration consuming a pinned v002 core |
| pccx-v003 | Next-generation implementation and experimental smoke paths; hardware results require separate evidence |
The dated KV260 deployment snapshot is retained for historical artifacts and debug provenance. New contributions should start in an active repository above.
- Read the first-check guide.
- Pick an existing issue or ask in Discussions.
- Submit a small PR with the source revision, command, expected result and logs.
Simulation, synthesis, implementation and measured board behavior are different evidence. We do not treat a smoke pass as a completed model or throughput result.
Altifigence operates and supports PCCX. PCCX is not currently a separate nonprofit foundation or an IRS-recognized tax-exempt organization. The developer support program is in preparation, not an offer of available credits.
Source-code licenses, documentation permissions and trademarks have separate boundaries. Check each repository and file; contributors retain their rights. Using Altifigence products or making a purchase is not required to contribute.
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