Bus_SPI: build the ESP32-C6 clock takeover with arduino-esp32 3.0 (ESP-IDF 5.1) - #326
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…P-IDF 5.1)
The SPI clock takeover (Arduino builds on C5 / C6 / C61 / P4) wraps its
read-modify-write of the clock-source register in PERIPH_RCC_ATOMIC(),
which ESP-IDF added in 5.2. arduino-esp32 3.0.x is built on ESP-IDF 5.1, so
an ESP32-C6 sketch failed to compile ("'PERIPH_RCC_ATOMIC' was not declared
in this scope"). C5 / C61 / P4 need arduino-esp32 3.1 or later and were not
affected.
ESP-IDF 5.1 has no shared lock for that register (its own SPI driver writes
the clock source without one), so where PERIPH_RCC_ATOMIC() is missing the
same block runs inside a critical section of its own.
This was referenced Oct 1, 2026
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With arduino-esp32 3.0.x (ESP-IDF 5.1), an ESP32-C6 sketch fails to compile:
The SPI clock takeover used on Arduino builds for C5 / C6 / C61 / P4 (temporarily selecting the 80 MHz GPSPI source when it gives a closer write clock) wraps its read-modify-write of the clock-source register in
PERIPH_RCC_ATOMIC(), which ESP-IDF added in 5.2. C5 / C61 / P4 need arduino-esp32 3.1 or later and are not affected.ESP-IDF 5.1 has no shared lock for that register (its own SPI driver writes the clock source without one). Where
PERIPH_RCC_ATOMIC()is missing, the same block now runs inside a critical section of its own; with ESP-IDF 5.2 and later nothing changes.Checks