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Achievement: Pull SharkAchievement: YOLOAchievement: Quickdraw

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kantorarthur/README.md

Check out my site: https://ubermenschs.com

I'm Arthur,

a 20 year old third year student pursuing a bachelor's degree in Computer Science at the Technical University of Cluj-Napoca (TUCN).
I'm currently based in Cluj-Napoca, Romania.

I'm highly interested in C++ and its application in fields where you first need to know what your machine does before knowing what your code does, such as High Frequency Trading and Critical Embedded Systems.

Tech Stack & Tools

  • Languages: : C++ (11/14/17/20/23/26) (primary focus), C, x86 Assembly, VHDL, SQL, Java, Python
  • Network Protocols: UDP, TCP/IP, HTTP, REST APIs
  • Tools & Technologies: CMake, Google Test, Redis, Docker, Anthropic API, Kernel.sh API, GCC 16.1, Claude Code, Render, Neovim, Git/GitHub, Linux, Vivado, VS Code, IntelliJ
  • Spoken Languages: English and Romanian

Recent Projects

  • ubermenschs.com: Full-stack PWA for daily philosophical practice: C++20 REST API (Crow) on Redis (AOF + replica), React + TypeScript frontend, a scheduler thread sending Web Push reminders and a Redis rate limiter.
    Latency (1,000 HTTPS requests, Romania to Frankfurt, new TLS connection each): p50/p95/p99 = 93/117/135 ms; time to first byte on an open connection: 60 ms (p50).

  • Dual-Core Cache Controller with MSI Snoopy Coherence: Private write-back, set-associative caches kept coherent by the MSI snoopy protocol over a shared bus with a round-robin arbiter, plus LRU/FIFO replacement.

  • Amazon Developer Hackaton - Six Agentic AI Workflow: The MCP server (FastMCP, MCP over Streamable HTTP) uses a six agentic AI workflow: a planner (Claude Sonnet 5.5) turns the spoken request into a plan, and four worker agents (Claude Haiku 5.5) browse Evomag, Altex, MediaGalaxy and Vexio concurrently using Python’s asyncio, each in its own cloud browser. The judge model it's mainly used to word the results. The cost per search is 0.01$.

  • Implied Volatility Estimator: Implemented a C++ program that estimates the implied volatility of a European call option in about 0.037 seconds while also running millions of simulations per contract. The program estimates the volatility factor using the "Monte Carlo Simulation" that also uses the newly added C++26 feature "std::philox_engine". The idea to implement this program in C++ came to my mind while taking notes on this personal study about the "Black-Scholes" model and its implementation using the Monte Carlo Simulation.

  • MIPS32 Processor: Implemented a fully functional 32-bit Processor using the MIPS32 architecture in VHDL. The project implements: the main data path and control logic found in a processor; instruction set; a demonstration program using the implemented instruction set.

  • Queue Management Simulation: A multi-threaded Java application simulating a client-server queueing system. It features configurable distribution strategies (Shortest Queue/Time), concurrent processing, and detailed performance logging.

Get in touch

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  1. Monte_Carlo_Implied_Volatility_Estimator Monte_Carlo_Implied_Volatility_Estimator Public

    Implemented a "Volatility Estimator" program in C++ that estimates the implied volatility factor used on a European call contract. The program estimates the implied volatility using the "Monte Carl…

    C++

  2. ubermenschs.com ubermenschs.com Public

    Ubermenschs.com - One step closer to the Übermensch

    C++

  3. alexa_plus_errand_crew_six_agentic_AI_workflow alexa_plus_errand_crew_six_agentic_AI_workflow Public

    Alexa+ MCP server, six agentic AI workflow, that sends parallel browser agents across the web, compares options, and speaks the answer back.

    Python

  4. Cache_Controller_with_Snoopy_Coherence_for_a_Dual-Core_System_VHDL Cache_Controller_with_Snoopy_Coherence_for_a_Dual-Core_System_VHDL Public

    The project designs, describes in VHDL and verifies by simulation a cache controller for a dual-core system. Each core has a private write-back cache; the two caches share one bus to main memory an…

    VHDL

  5. MIPS32_CPU MIPS32_CPU Public

    32 bits MIPS CPU implemented in VHDL. Implemented Single Cycle version alongside 5 staged Pipeline version.

    VHDL

  6. clients-queue-simulation-application clients-queue-simulation-application Public

    Multi-threaded queueing system simulator built with Java and Swing. Simulates concurrent client-to-server distribution strategies in real time, with each queue running on its own dedicated thread.

    Java