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Fixed the missing immediate prefix on MOV in Cortex-M schedulers #693

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Merged
fdesbiens merged 1 commit into from
Sep 3, 2026
Merged

Fixed the missing immediate prefix on MOV in Cortex-M schedulers #693

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4 changes: 3 additions & 1 deletion ports/cortex_m3/ac5/src/tx_thread_schedule.s
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,8 @@
* SPDX-License-Identifier: MIT
**************************************************************************/

// Some portions generated by Copilot (Opus 5).


/**************************************************************************/
/**************************************************************************/
Expand Down Expand Up @@ -132,7 +134,7 @@ __tx_ts_handler
BL _tx_execution_thread_exit // Call the thread exit function
POP {r0, lr} // Recover LR
#ifdef TX_PORT_USE_BASEPRI
MOV r0, 0 // Disable BASEPRI masking (enable interrupts)
MOV r0, #0 // Disable BASEPRI masking (enable interrupts)
MSR BASEPRI, r0
#else
CPSIE i // Enable interrupts
Expand Down
4 changes: 3 additions & 1 deletion ports/cortex_m3/iar/src/tx_thread_schedule.s
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,8 @@
* SPDX-License-Identifier: MIT
**************************************************************************/

// Some portions generated by Copilot (Opus 5).


/**************************************************************************/
/**************************************************************************/
Expand Down Expand Up @@ -132,7 +134,7 @@ __tx_ts_handler:
BL _tx_execution_thread_exit // Call the thread exit function
POP {r0, lr} // Recover LR
#ifdef TX_PORT_USE_BASEPRI
MOV r0, 0 // Disable BASEPRI masking (enable interrupts)
MOV r0, #0 // Disable BASEPRI masking (enable interrupts)
MSR BASEPRI, r0
#else
CPSIE i // Enable interrupts
Expand Down
4 changes: 3 additions & 1 deletion ports/cortex_m33/iar/src/tx_thread_schedule.s
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,8 @@
* SPDX-License-Identifier: MIT
**************************************************************************/

// Some portions generated by Copilot (Opus 5).


/**************************************************************************/
/**************************************************************************/
Expand Down Expand Up @@ -129,7 +131,7 @@ __tx_ts_handler:
BL _tx_execution_thread_exit // Call the thread exit function
POP {r0, lr} // Recover LR
#ifdef TX_PORT_USE_BASEPRI
MOV r0, 0 // Disable BASEPRI masking (enable interrupts)
MOV r0, #0 // Disable BASEPRI masking (enable interrupts)
MSR BASEPRI, r0
#else
CPSIE i // Enable interrupts
Expand Down
4 changes: 3 additions & 1 deletion ports/cortex_m4/ac5/src/tx_thread_schedule.s
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,8 @@
* SPDX-License-Identifier: MIT
**************************************************************************/

// Some portions generated by Copilot (Opus 5).


/**************************************************************************/
/**************************************************************************/
Expand Down Expand Up @@ -132,7 +134,7 @@ __tx_ts_handler
BL _tx_execution_thread_exit // Call the thread exit function
POP {r0, lr} // Recover LR
#ifdef TX_PORT_USE_BASEPRI
MOV r0, 0 // Disable BASEPRI masking (enable interrupts)
MOV r0, #0 // Disable BASEPRI masking (enable interrupts)
MSR BASEPRI, r0
#else
CPSIE i // Enable interrupts
Expand Down
4 changes: 3 additions & 1 deletion ports/cortex_m4/iar/src/tx_thread_schedule.s
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,8 @@
* SPDX-License-Identifier: MIT
**************************************************************************/

// Some portions generated by Copilot (Opus 5).


/**************************************************************************/
/**************************************************************************/
Expand Down Expand Up @@ -132,7 +134,7 @@ __tx_ts_handler:
BL _tx_execution_thread_exit // Call the thread exit function
POP {r0, lr} // Recover LR
#ifdef TX_PORT_USE_BASEPRI
MOV r0, 0 // Disable BASEPRI masking (enable interrupts)
MOV r0, #0 // Disable BASEPRI masking (enable interrupts)
MSR BASEPRI, r0
#else
CPSIE i // Enable interrupts
Expand Down
4 changes: 3 additions & 1 deletion ports/cortex_m52/iar/src/tx_thread_schedule.s
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,8 @@
* SPDX-License-Identifier: MIT
**************************************************************************/

// Some portions generated by Copilot (Opus 5).


/**************************************************************************/
/**************************************************************************/
Expand Down Expand Up @@ -129,7 +131,7 @@ __tx_ts_handler:
BL _tx_execution_thread_exit // Call the thread exit function
POP {r0, lr} // Recover LR
#ifdef TX_PORT_USE_BASEPRI
MOV r0, 0 // Disable BASEPRI masking (enable interrupts)
MOV r0, #0 // Disable BASEPRI masking (enable interrupts)
MSR BASEPRI, r0
#else
CPSIE i // Enable interrupts
Expand Down
4 changes: 3 additions & 1 deletion ports/cortex_m55/iar/src/tx_thread_schedule.s
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,8 @@
* SPDX-License-Identifier: MIT
**************************************************************************/

// Some portions generated by Copilot (Opus 5).


/**************************************************************************/
/**************************************************************************/
Expand Down Expand Up @@ -129,7 +131,7 @@ __tx_ts_handler:
BL _tx_execution_thread_exit // Call the thread exit function
POP {r0, lr} // Recover LR
#ifdef TX_PORT_USE_BASEPRI
MOV r0, 0 // Disable BASEPRI masking (enable interrupts)
MOV r0, #0 // Disable BASEPRI masking (enable interrupts)
MSR BASEPRI, r0
#else
CPSIE i // Enable interrupts
Expand Down
4 changes: 3 additions & 1 deletion ports/cortex_m7/ac5/src/tx_thread_schedule.s
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,8 @@
* SPDX-License-Identifier: MIT
**************************************************************************/

// Some portions generated by Copilot (Opus 5).


/**************************************************************************/
/**************************************************************************/
Expand Down Expand Up @@ -132,7 +134,7 @@ __tx_ts_handler
BL _tx_execution_thread_exit // Call the thread exit function
POP {r0, lr} // Recover LR
#ifdef TX_PORT_USE_BASEPRI
MOV r0, 0 // Disable BASEPRI masking (enable interrupts)
MOV r0, #0 // Disable BASEPRI masking (enable interrupts)
MSR BASEPRI, r0
#else
CPSIE i // Enable interrupts
Expand Down
4 changes: 3 additions & 1 deletion ports/cortex_m7/iar/src/tx_thread_schedule.s
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,8 @@
* SPDX-License-Identifier: MIT
**************************************************************************/

// Some portions generated by Copilot (Opus 5).


/**************************************************************************/
/**************************************************************************/
Expand Down Expand Up @@ -132,7 +134,7 @@ __tx_ts_handler:
BL _tx_execution_thread_exit // Call the thread exit function
POP {r0, lr} // Recover LR
#ifdef TX_PORT_USE_BASEPRI
MOV r0, 0 // Disable BASEPRI masking (enable interrupts)
MOV r0, #0 // Disable BASEPRI masking (enable interrupts)
MSR BASEPRI, r0
#else
CPSIE i // Enable interrupts
Expand Down
4 changes: 3 additions & 1 deletion ports/cortex_m85/iar/src/tx_thread_schedule.s
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,8 @@
* SPDX-License-Identifier: MIT
**************************************************************************/

// Some portions generated by Copilot (Opus 5).


/**************************************************************************/
/**************************************************************************/
Expand Down Expand Up @@ -129,7 +131,7 @@ __tx_ts_handler:
BL _tx_execution_thread_exit // Call the thread exit function
POP {r0, lr} // Recover LR
#ifdef TX_PORT_USE_BASEPRI
MOV r0, 0 // Disable BASEPRI masking (enable interrupts)
MOV r0, #0 // Disable BASEPRI masking (enable interrupts)
MSR BASEPRI, r0
#else
CPSIE i // Enable interrupts
Expand Down
4 changes: 3 additions & 1 deletion ports_arch/ARMv7-M/threadx/ac5/src/tx_thread_schedule.s
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,8 @@
* SPDX-License-Identifier: MIT
**************************************************************************/

// Some portions generated by Copilot (Opus 5).


/**************************************************************************/
/**************************************************************************/
Expand Down Expand Up @@ -132,7 +134,7 @@ __tx_ts_handler
BL _tx_execution_thread_exit // Call the thread exit function
POP {r0, lr} // Recover LR
#ifdef TX_PORT_USE_BASEPRI
MOV r0, 0 // Disable BASEPRI masking (enable interrupts)
MOV r0, #0 // Disable BASEPRI masking (enable interrupts)
MSR BASEPRI, r0
#else
CPSIE i // Enable interrupts
Expand Down
4 changes: 3 additions & 1 deletion ports_arch/ARMv7-M/threadx/iar/src/tx_thread_schedule.s
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,8 @@
* SPDX-License-Identifier: MIT
**************************************************************************/

// Some portions generated by Copilot (Opus 5).


/**************************************************************************/
/**************************************************************************/
Expand Down Expand Up @@ -132,7 +134,7 @@ __tx_ts_handler:
BL _tx_execution_thread_exit // Call the thread exit function
POP {r0, lr} // Recover LR
#ifdef TX_PORT_USE_BASEPRI
MOV r0, 0 // Disable BASEPRI masking (enable interrupts)
MOV r0, #0 // Disable BASEPRI masking (enable interrupts)
MSR BASEPRI, r0
#else
CPSIE i // Enable interrupts
Expand Down
6 changes: 4 additions & 2 deletions ports_arch/ARMv7-M/threadx_modules/ac5/module_manager/src/tx_thread_schedule.s
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,8 @@
* SPDX-License-Identifier: MIT
**************************************************************************/

// Some portions generated by Copilot (Opus 5).


/**************************************************************************/
/**************************************************************************/
Expand Down Expand Up @@ -206,7 +208,7 @@ MemManage_Handler
STR r1, [r0] // Store ICSR
DSB // Wait for memory access to complete
#ifdef TX_PORT_USE_BASEPRI
MOV r0, 0 // Disable BASEPRI masking (enable interrupts)
MOV r0, #0 // Disable BASEPRI masking (enable interrupts)
MSR BASEPRI, r0
#else
CPSIE i // Enable interrupts
Expand Down Expand Up @@ -238,7 +240,7 @@ __tx_ts_handler
BL _tx_execution_thread_exit // Call the thread exit function
POP {r0, lr} // Recover LR
#ifdef TX_PORT_USE_BASEPRI
MOV r0, 0 // Disable BASEPRI masking (enable interrupts)
MOV r0, #0 // Disable BASEPRI masking (enable interrupts)
MSR BASEPRI, r0
#else
CPSIE i // Enable interrupts
Expand Down
6 changes: 4 additions & 2 deletions ports_arch/ARMv7-M/threadx_modules/iar/module_manager/src/tx_thread_schedule.s
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,8 @@
* SPDX-License-Identifier: MIT
**************************************************************************/

// Some portions generated by Copilot (Opus 5).


/**************************************************************************/
/**************************************************************************/
Expand Down Expand Up @@ -207,7 +209,7 @@ UsageFault_Handler:
STR r1, [r0] // Store ICSR
DSB // Wait for memory access to complete
#ifdef TX_PORT_USE_BASEPRI
MOV r0, 0 // Disable BASEPRI masking (enable interrupts)
MOV r0, #0 // Disable BASEPRI masking (enable interrupts)
MSR BASEPRI, r0
#else
CPSIE i // Enable interrupts
Expand Down Expand Up @@ -239,7 +241,7 @@ __tx_ts_handler:
BL _tx_execution_thread_exit // Call the thread exit function
POP {r0, lr} // Recover LR
#ifdef TX_PORT_USE_BASEPRI
MOV r0, 0 // Disable BASEPRI masking (enable interrupts)
MOV r0, #0 // Disable BASEPRI masking (enable interrupts)
MSR BASEPRI, r0
#else
CPSIE i // Enable interrupts
Expand Down
4 changes: 3 additions & 1 deletion ports_arch/ARMv8-M/threadx/iar/src/tx_thread_schedule.s
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,8 @@
* SPDX-License-Identifier: MIT
**************************************************************************/

// Some portions generated by Copilot (Opus 5).


/**************************************************************************/
/**************************************************************************/
Expand Down Expand Up @@ -129,7 +131,7 @@ __tx_ts_handler:
BL _tx_execution_thread_exit // Call the thread exit function
POP {r0, lr} // Recover LR
#ifdef TX_PORT_USE_BASEPRI
MOV r0, 0 // Disable BASEPRI masking (enable interrupts)
MOV r0, #0 // Disable BASEPRI masking (enable interrupts)
MSR BASEPRI, r0
#else
CPSIE i // Enable interrupts
Expand Down
6 changes: 4 additions & 2 deletions ports_module/cortex_m3/ac5/module_manager/src/tx_thread_schedule.s
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,8 @@
* SPDX-License-Identifier: MIT
**************************************************************************/

// Some portions generated by Copilot (Opus 5).


/**************************************************************************/
/**************************************************************************/
Expand Down Expand Up @@ -206,7 +208,7 @@ MemManage_Handler
STR r1, [r0] // Store ICSR
DSB // Wait for memory access to complete
#ifdef TX_PORT_USE_BASEPRI
MOV r0, 0 // Disable BASEPRI masking (enable interrupts)
MOV r0, #0 // Disable BASEPRI masking (enable interrupts)
MSR BASEPRI, r0
#else
CPSIE i // Enable interrupts
Expand Down Expand Up @@ -238,7 +240,7 @@ __tx_ts_handler
BL _tx_execution_thread_exit // Call the thread exit function
POP {r0, lr} // Recover LR
#ifdef TX_PORT_USE_BASEPRI
MOV r0, 0 // Disable BASEPRI masking (enable interrupts)
MOV r0, #0 // Disable BASEPRI masking (enable interrupts)
MSR BASEPRI, r0
#else
CPSIE i // Enable interrupts
Expand Down
6 changes: 4 additions & 2 deletions ports_module/cortex_m3/iar/module_manager/src/tx_thread_schedule.s
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,8 @@
* SPDX-License-Identifier: MIT
**************************************************************************/

// Some portions generated by Copilot (Opus 5).


/**************************************************************************/
/**************************************************************************/
Expand Down Expand Up @@ -207,7 +209,7 @@ UsageFault_Handler:
STR r1, [r0] // Store ICSR
DSB // Wait for memory access to complete
#ifdef TX_PORT_USE_BASEPRI
MOV r0, 0 // Disable BASEPRI masking (enable interrupts)
MOV r0, #0 // Disable BASEPRI masking (enable interrupts)
MSR BASEPRI, r0
#else
CPSIE i // Enable interrupts
Expand Down Expand Up @@ -239,7 +241,7 @@ __tx_ts_handler:
BL _tx_execution_thread_exit // Call the thread exit function
POP {r0, lr} // Recover LR
#ifdef TX_PORT_USE_BASEPRI
MOV r0, 0 // Disable BASEPRI masking (enable interrupts)
MOV r0, #0 // Disable BASEPRI masking (enable interrupts)
MSR BASEPRI, r0
#else
CPSIE i // Enable interrupts
Expand Down
6 changes: 4 additions & 2 deletions ports_module/cortex_m33/iar/module_manager/src/tx_thread_schedule.s
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,8 @@
* SPDX-License-Identifier: MIT
**************************************************************************/

// Some portions generated by Copilot (Opus 5).


/**************************************************************************/
/**************************************************************************/
Expand Down Expand Up @@ -208,7 +210,7 @@ BusFault_Handler:
STR r1, [r0] // Store ICSR
DSB // Wait for memory access to complete
#ifdef TX_PORT_USE_BASEPRI
MOV r0, 0 // Disable BASEPRI masking (enable interrupts)
MOV r0, #0 // Disable BASEPRI masking (enable interrupts)
MSR BASEPRI, r0
#else
CPSIE i // Enable interrupts
Expand Down Expand Up @@ -239,7 +241,7 @@ __tx_ts_handler:
BL _tx_execution_thread_exit // Call the thread exit function
POP {r0, lr} // Recover LR
#ifdef TX_PORT_USE_BASEPRI
MOV r0, 0 // Disable BASEPRI masking (enable interrupts)
MOV r0, #0 // Disable BASEPRI masking (enable interrupts)
MSR BASEPRI, r0
#else
CPSIE i // Enable interrupts
Expand Down
6 changes: 4 additions & 2 deletions ports_module/cortex_m4/ac5/module_manager/src/tx_thread_schedule.s
View file
Open in desktop
Original file line number Diff line number Diff line change
Expand Up @@ -9,6 +9,8 @@
* SPDX-License-Identifier: MIT
**************************************************************************/

// Some portions generated by Copilot (Opus 5).


/**************************************************************************/
/**************************************************************************/
Expand Down Expand Up @@ -206,7 +208,7 @@ MemManage_Handler
STR r1, [r0] // Store ICSR
DSB // Wait for memory access to complete
#ifdef TX_PORT_USE_BASEPRI
MOV r0, 0 // Disable BASEPRI masking (enable interrupts)
MOV r0, #0 // Disable BASEPRI masking (enable interrupts)
MSR BASEPRI, r0
#else
CPSIE i // Enable interrupts
Expand Down Expand Up @@ -238,7 +240,7 @@ __tx_ts_handler
BL _tx_execution_thread_exit // Call the thread exit function
POP {r0, lr} // Recover LR
#ifdef TX_PORT_USE_BASEPRI
MOV r0, 0 // Disable BASEPRI masking (enable interrupts)
MOV r0, #0 // Disable BASEPRI masking (enable interrupts)
MSR BASEPRI, r0
#else
CPSIE i // Enable interrupts
Expand Down
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