Researcher, Computer Scientist.
Building Electronic Design Automation tools to drive silicon performance.
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Google
- San Francisco Bay Area
- https://aletempiac.github.io/
- https://orcid.org/0000-0003-1312-2907
- @AleTempia
- in/alessandro-tempia-calvino
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abc
abc PublicForked from berkeley-abc/abc
ABC: System for Sequential Logic Synthesis and Formal Verification
C
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OpenROAD
OpenROAD PublicForked from The-OpenROAD-Project/OpenROAD
OpenROAD's unified application implementing an RTL-to-GDS Flow. Documentation at https://openroad.readthedocs.io/en/latest/
Verilog
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