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feat(minimax-h3): add VDN inference and parallel - #1528

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Watebear wants to merge 4 commits into
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vdn
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Watebear wants to merge 4 commits into
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vdn

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Run VDN checkpoints through the existing H3 runner, encoders, VAEs, offload and Ulysses paths. Add hybrid window/linear attention and load branch weights with ordered default/turbo adapter merging.

Run VDN checkpoints through the existing H3 runner, encoders, VAEs,
offload and Ulysses paths. Add hybrid window/linear attention and load
branch weights with ordered default/turbo adapter merging.

Key AdaLN caches by effective checkpoint and adapter identity (format 2).
Add configurable noise generation and Qwen-only image references for
matched benchmarks. Use deterministic frame reductions and contiguous
Q activation inputs to resolve the observed repeatability and SP drift.

Include the vdn_sp_8step.json profile, launch script and benchmark harness.

Validation:
- Ruff checks, Python/JSON syntax, shell syntax and staged whitespace checks.
- Small-case full 8-step SP1/SP4 and independent SP4 repeats: 73/73 tensors exact.
- Two full-size SP4 scenarios, each with 2 warmups and 3 measured requests;
  all five video, audio and MP4 hashes match within each scenario.
Remove duplicate validation, forwarding helpers, and redundant bookkeeping.
Reuse read-only adapter readers and retain the existing cache identity and
ordered LoRA merge behavior. Remove the VDN benchmark script.

Validation: CPU attention, scheduler, weight/cache and communication checks;
Ruff, JSON and shell checks; SP4 8-step regression with all 73 captured tensors
exactly matching the previous implementation.
Reduce configure_vdn to reading model_spec.json and exposing the checkpoint
path and attention configuration. Remove redundant artifact prechecks and
its unused return value.

Keep unsupported TP, quantization, and extra LoRA checks at model entry.

Validation: released Stage-B/DMD configuration and adapter order match the
previous version; all five model-entry conflict checks pass; Ruff and AST
checks pass. No inference arithmetic changes.
Shard VDN attention heads and branch weights for TP and combined TP/SP.
Merge ordered adapters before slicing weights and reuse H3 linear and
offload components.

Add optional tp_reproducible arithmetic with eight logical GEMM partitions,
FP64 row reduction and seven-head VDN linear calls. TP1 uses the same
partitions, so this mode establishes a new shared numerical baseline.

Provide 8-step presets for TP8, SP8 and TP4+SP2 with an 8-GPU launcher.

Validation: native TP1/TP8 at 768p, 124 frames, DMD8 and cached AdaLN produced
identical 400 block outputs, 73 captured tensors and MP4 files. Focused CPU
checks, Ruff, Python compilation, shell syntax and config checks passed.
@Watebear Watebear changed the title feat(minimax-h3): add native VDN inference feat(minimax-h3): add VDN inference Sep 18, 2026
@Watebear Watebear changed the title feat(minimax-h3): add VDN inference feat(minimax-h3): add VDN inference and parallel Sep 18, 2026
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