halmodule: fix inverted success check in port read() and peek()

src/hal/halmodule.cc

@@ -970,7 +970,7 @@ static PyObject *pyhal_port_read_peek(pyhalitem *item, PyObject *o, bool isread)
         b = hal_port_read(item->pin.u->p, PyBytes_AsString(bts), (unsigned)l);
     else
         b = hal_port_peek(item->pin.u->p, PyBytes_AsString(bts), (unsigned)l);
-    if(b) {
+    if(!b) {
         Py_DECREF(bts);
         Py_INCREF(Py_False);
         return Py_False;

tests/halmodule/port/expected

@@ -0,0 +1 @@
+pass

tests/halmodule/port/porttest.py

@@ -0,0 +1,19 @@
+#!/usr/bin/env python3
+# Port pins: write, then peek/peek_commit/read the same bytes back.
+import hal
+c = hal.component("porttest")
+wr = c.newpin("out", hal.Type.PORT, hal.Dir.OUT)
+rd = c.newpin("in", hal.Type.PORT, hal.Dir.IN)
+c.ready()
+hal.new_sig("portsig", hal.Type.PORT)
+hal.connect("porttest.out", "portsig")
+hal.connect("porttest.in", "portsig")
+hal.set_s("portsig", "16")
+
+assert wr.write(b"hello world")
+assert rd.peek(5) == b"hello"
+assert rd.peek_commit(6)
+assert rd.read(5) == b"world"
+assert rd.read(1) is False
+c.exit()
+print("pass")

tests/halmodule/port/test.hal

@@ -0,0 +1 @@
+loadusr -w ./porttest.py