Missing #

[42Bastian]

Describe the bug
This line misses a "#"

threadx/ports/cortex_m33/gnu/src/tx_thread_schedule.S

Line 145 in 12dac1d

MOV r0, 0 // Disable BASEPRI masking (enable interrupts)

[fdesbiens]

Thank you, @42Bastian.

I will discuss this with the team and fix as needed.

[billlamiework]

Yes, this line should have a #, however, I tried it with one GCC compiler on my side and it generated the correct code. Are you seeing an actual error on your side? If so, which GCC compiler version are you using?

[42Bastian]

GCC (or AS) and as I see IAR:

threadx/ports/cortex_m33/iar/src/tx_thread_schedule.s

Line 148 in 12dac1d

MOV r0, 0 // Disable BASEPRI masking (enable interrupts)

do not blame, but for example TI Clang will.

[billlamiework]

I completely agree that it should be fixed, but wanted to note that GCC was forgiving of the missing #. From: 42Bastian ***@***.***> Sent: Monday, September 15, 2025 8:54 PM To: eclipse-threadx/threadx ***@***.***> Cc: Bill Lamie ***@***.***>; Assign ***@***.***> Subject: Re: [eclipse-threadx/threadx] Missing # (Issue #461) [https://avatars.githubusercontent.com/u/20296416?s=20&v=4]42Bastian left a comment (eclipse-threadx/threadx#461)<#461 (comment)> GCC (or AS) and as I see IAR: https://github.com/eclipse-threadx/threadx/blob/12dac1d67d0dfe1c06f839ee285e190c759865a7/ports/cortex_m33/iar/src/tx_thread_schedule.s#L148 do not blame, but for example TI Clang will. — Reply to this email directly, view it on GitHub<#461 (comment)>, or unsubscribe<https://github.com/notifications/unsubscribe-auth/BDUEV3DRGZFQW5FOXTDPZBD3S6CWNAVCNFSM6AAAAACD6TP6E6VHI2DSMVQWIX3LMV43OSLTON2WKQ3PNVWWK3TUHMZTEOJUG44DEOJQHA>. You are receiving this because you were assigned.Message ID: ***@***.******@***.***>>

[42Bastian]

I know, GCC is very "liberal" :-) Fell into this trap myself.

[fdesbiens]

Thanks for the report @42Bastian, and for confirming it @billlamiework.

I have opened #693 to fix this. While looking into it I found the same missing # in 31 places across 22 files, not just the one line you linked: the Cortex-M3, M4, M7, M33, M52, M55 and M85 ports, their module manager counterparts, and the shared ARMv7-M and ARMv8-M sources. The GNU and AC6 variants had already been corrected, so what remained were the IAR and AC5 ones.

I confirmed that both spellings assemble to the same Thumb-2 encoding (f04f 0000), so nothing changes in the generated code — it only stops the stricter assemblers from rejecting the source, which was exactly your point.